Job Description
FPGA Verification EngineerInside IR35 and WILL require regular access to London offices Job DescriptionWe need an RTL verification expert to build up a UVM system and implement RTL simulations for system-level functional verification of our FPGA designs. Ideally, this candidate would be proficient with Cadence Xcelium also as this is a tool this area uses. Essential SkillsKnowledge of high-speed communication interfaces like Ethernet and PCIeKnowledge of RF and DSP fundamentalsExperience designing RTL for high-speed or multiple clock domain designs Location London, UK Trading as TEKsystems. Allegis Group Limited, Maxis 2, Western Road, Bracknell, RG12 1RT, United Kingdom. No. 2876353. Allegis Group Limited operates as an Employment Business and Employment Agency as set out in the Conduct of Employment Agencies and Employment Businesses Regulations 2003. TEKsystems is a company within the Allegis Group network of companies (collectively referred to as "Allegis Group"). Aerotek, Aston Carter, EASi, Talentis Solutions, TEKsystems, Stamford Consultants and The Stamford Group are Allegis Group brands.